Capacitor sealing ring requirements

What is a seal ring IC?

The seal-ring structure has been modified and used as the on-chip ESD bus to overcome internal damages inside the IC with multiple separated power pins . The distance from the seal-ring structure to the active devices are distinctly different from the layout styles of the I/O structures.

What is a seal ring assembly distance?

The distance from the seal-ring structure to the active devices are distinctly different from the layout styles of the I/O structures. In Figs. 2(a) and 2(b), the assembly distance is defined as the spacing between the seal-ring edge and the chip edge.

Why do capacitors need to be sealed?

They must provide sealing and mechanical, thermal and chemical resistance. Capacitors can be damaged in many ways, including internal faults or external overloads that can cause an explosion, especially in devices like AC film capacitors with relatively high energy content.

What is a seal ring IC & ESD protection scheme?

Recently, the seal-ring structure has been co-designed with an ESD protection scheme to improve ESD robustness of the chip. The seal-ring structure has been modified and used as the on-chip ESD bus to overcome internal damages inside the IC with multiple separated power pins .

Why is the capacitor market so complex?

The capacitor market is complex, with many product geometries, designs, properties and applications. New technologies and the demand for improved productivity levels have a high impact on the materials used for the construction of capacitors. These materials must meet the rigorous demands of the industry.

Should a multi-terminal capacitor be soldered to a blank terminal?

When provided, blank terminals of a multi-terminal capacitor should be considered to be at the same potential as the electrolyte, or cathode, and should therefore be isolated from the circuit. Incorrect soldering may shrink or break the capacitor sleeve. Please read the following information carefully.